The "Understanding Serial ATA" course provides students with a comprehensive insight into the operation of the Serial ATA interface. The class examines the evolution of ATA, summarizes the operation of the parallel ATA interface and then explores in detail the operation of Serial ATA at all architectural levels. Serial ATA II Extensions are also thoroughly discussed. The class concludes with a study of new application areas in which Serial ATA will be deployed. Protocol analyzer traces are used as an aid to understanding.

Course Outline
Introduction History and evolution of ATA Parallel ATA limitations Moving to a serial interface Serial ATA goals and objectives Serial ATA benefits Comparison of storage interfaces New markets for ATA devices ATA Standards and Architecture ANSI and industry associations Parallel ATA standards Serial ATA standards SATA architectural layering Understanding terms and definitions Sources of information ATA Technical Overview Parallel bus functions The I/O register model CHS and LBA addressing PIO and DMA data transfer modes Serial ATA Technical Overview SATA architectural model Physical layer concepts  Topology/connectivity  Power and signal lines  Link speeds/data rates  Basic SATA port model  Physical layer services	SATA Technical Overview (cont.) Link layer concepts  Transmission words  8b/10b encoding concepts  Primitives  Framing concepts  Scrambling Transport layer concepts  Frame Information Structures (FIS)  FIS types Error detection and recovery concepts Example analyzer trace SATA II enhancement summary      (end of Day 1) Physical Layer Cables and connectors Electrical signaling Spread spectrum clocking Interface power states Link initialization Speed negotiation Out of band signaling Elasticity buffering Link Layer Link layer services 8b/10b encoding Primitive signal definitions Primitive signal protocols Flow control Primitive scrambling CRC and FIS content scrambling Link state diagrams Example analyzer trace	Transport Layer Transport layer services FIS construction and decomposition FIS structure FIS types Host transport states Device transport states Example analyzer trace Device Command Layer Protocol Power on behavior Device resets Diagnostics Non-data command protocol PIO command protocol DMA command protocol Error Handling Physical layer errors Link Layer errors Transport layer errors Serial ATA II Extensions SATA II objectives Physical layer extensions Transport layer extensions Command layer extensions Enclosure services and management Serial ATA in the Enterprise Future enhancements to Serial ATA

Who Should Attend
This in-depth technical class is targeted towards engineers involved in the design, development, integration, deployment and maintenance of Serial ATA storage devices and systems. Day 1 of the class may be taken by those requiring a broad understanding of Serial ATA technology with less technical depth; this includes technical managers, IT managers and staff, technical writers, technical sales and marketing staff.

Prerequisites: An understanding of current computer interfaces or networks is useful, but not necessary.
Course Length: 2 Days